Product Information

The Technobox, Inc P/N 4289 provides a vehicle for implementing complex user-specific digital designs requiring a differential interface. It is a second-generation design that features 64b/66MHz PCI bus support, up to 66 MHz local bus clock, and a standard 12K Logic Elements (LE) FPGA.

The design features a total of 32 general-purpose RS422/RS485 driven digital I/Os wired to both the front panel and rear PN4 connector (64 signals per connector taking into account 2 signals per differential pair). For each of the 32 channels, the bi-directionality is controlled by an output from the FPGA. Local bus clock is selectable as 24, 33, 50, or 66 MHz using resistor jumpers. Any frequency with better than 0.1% accuracy can be generated by the PLL as programmed from the host processor.

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